Location

San Jose, CA, USA

RTL Design Engineer

Full Time

JOB DESCRIPTION

We are looking for a team player with solid technical skills to add to our core engineering team. Candidates must have a strong technical background and be capable of coming up to speed on new technologies quickly. Good communication skills, great problem-solving skills, and the ability to work both individually and collaboratively in a team environment are required. If you enjoy working in a fast-paced environment with the smartest team and the very latest technology, then this is the job for you! This is a mid-level engineering position, developing embedded software for our state Linux platform.

Eligibility

Key Requirements:

Design and Integrate digital hardware blocs for high-performance networking SOC.

Education

  • B.S/M. S in Electrical Engineering or related field plus minimum 3 years of RTL development experience

Experience

• Experience with PCIe/CXL, AXI, Ethernet
• Prior experience working with Ethernet NIC or Switch ASICs
• Experience with FPGA emulation
• Design knowledge of NIC/Switch design and Ethernet MAC design is a plus

Special Skills

• What we are looking for in this position:

• Advanced knowledge of Micro-architecture and RTL design for ASIC/SOC

• Expert in System Verilog/Verilog design of synthesizable digital logic

• A clear understanding of high performance and low power design

• RTL design experience, Synthesis, static-timing closure, formal verification and gate-level simulations.

• Design knowledge of one/more industry-standard bus interfaces (PCIe, SPI, SRIO, USB, XAUI, etc.) and memory interfaces (DDR2, DDR3, etc.) is a plus.

• Team player with excellent communication skills and the desire to take on diverse challenges.

Apply Now

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